1. Field of the Invention
The present invention relates generally to insulative structures for use on semiconductor substrates and, more particularly, to plasma enhanced chemical vapor deposition methods for forming thin layers on integrated circuits.
2. Description of Related Art
As integrated circuit devices are progressively miniaturized, reduced interconnect (e.g., conductive lines and vias) separations and geometries can undesirably augment capacitances and resistances of the interconnect structures. These increased electrical properties can introduce, for example, cross talk noise and propagation delays between interlevel and intralevel conductive interconnects. The reduction or elimination of adverse capacitive couplings, for instance, could advantageously lead to enhanced device speed and reduced power consumption. In the context of integrated circuits, it is known that capacitance, for example, can be attenuated by employing insulating materials with lower dielectric constants.
Having one of the lowest dielectric constants of known inorganic materials, silicon dioxide (SiO2) has long been used in integrated circuits as a primary insulating material. The addition of relatively small amounts of fluorine into silicon dioxide films has been found to lower the dielectric constant down into the low to mid three range. Further reduction of the dielectric constant, however, typically requires more advanced and committed uses of organic materials. On the topic of organic materials, fluorocarbon-based polymers have been recognized in the prior art as potentially attractive low-dielectric constant materials.
Plasma reactors can be used to deposit dielectric films onto the surfaces of integrated circuits. These plasma reactors ionize one or more gases with energy, which is typically in the form of radio frequency (RF) signals, in a plasma chamber. Energy from a RF plasma source may be inductively introduced into a plasma chamber, or the energy may be introduced via an electrode. The ionized gases adhere to the surfaces of the integrated circuits within the plasma reactors, thereby forming dielectric films on the integrated circuits. These techniques are generally referred to as plasma enhanced chemical vapor deposition (CVD) procedures. As an example, a fluorocarbon film may be produced by ionizing a fluorocarbon gas in a plasma reactor and then depositing the ionized gas onto an integrated circuit.
However, plasma enhanced CVD processes can be relatively difficult to control. In particular, the formation of a suitably thin and optimally distributed layer of fluorocarbon onto, for example, a dielectric material can be difficult. In cases where a fluorocarbon film is to be deposited onto a dielectric material, the fluorocarbon plasma can undesirably react with the dielectric material on which the film is to be deposited. For example, when the dielectric material comprises a patterned oxide or nitride material, the oxide or nitride material may be etched by the plasma instead of being coated with a dielectric film.
The present invention provides methods of depositing dielectric films onto materials, such as patterned dielectric materials, which would otherwise be susceptible to being etched under the deposition conditions. In accordance with one aspect of the present invention, a thin film is first deposited onto a patterned dielectric material as a passivation layer, and, subsequently, a dielectric (e.g., polymer) layer is deposited onto the patterned dielectric material without the underlying substrate and/or the patterned dielectric material being etched by the plasma. The dielectric layer, such as a fluorocarbon layer, can thus be successfully deposited onto the patterned dielectric material.
An object is to provide an improved method of depositing a thin, low-dielectric polymer film onto the surface of a substrate material, such as a patterned dielectric material, using a passivation layer so that the plasma does not adversely react with the substrate material.
To achieve these and other advantages and in accordance with a purpose of the present invention, as embodied and broadly described herein, the invention provides a method of forming a polymer layer on a patterned material, comprising the steps of: providing a substrate; forming a passivation layer over the substrate in a dual plasma source chamber; and forming a polymer layer on the passivation layer with an in-situ process. The substrate can have a patterned material formed thereon, and the passivation layer can be formed on the patterned material. The patterned material can comprise a silicon oxide layer or a silicon nitride layer, or can comprise, inter alia, a silicon layer. The passivation layer can be formed using a near-zero bias power to a thickness of about 10 to about 50 angstroms, wherein the passivation layer is directly adsorbed on the surface of the patterned material but not onto exposed surfaces of the substrate. The polymer layer can be formed using a CFX gas within a dual-RF source plasma chamber.
In accordance with another aspect of the present invention, a semiconductor construction comprises: a substrate; a patterned material formed on the substrate; a thin passivation layer on the patterned material, wherein the thin passivation layer is absorbed onto surfaces of the patterned material; and a polymer layer on the passivation layer. The patterned material can comprise a patterned dielectric material that is formed on the substrate.
According to another aspect of the present invention, a method of depositing a polymer layer on a patterned material comprises the steps of: placing a substrate having a patterned material formed thereon into a dual plasma-source reaction chamber; introducing a reaction gas into the reaction chamber; ionizing the reaction gas with a first plasma source to form a passivation layer; increasing a bias on the substrate with a second plasma source; and depositing a fluorocarbon film onto the passivation layer. The passivation layer can be formed on exposed surfaces of the patterned material, and the polymer layer can also be formed on exposed surfaces of the passivation layer.
Any feature or combination of features described herein are included within the scope of the present invention provided that the features included in any such combination are not mutually inconsistent as will be apparent from the context, this specification, and the knowledge of one of ordinary skill in the art. Additional advantages and aspects of the present invention are apparent in the following detailed description and claims.